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--- en:multiasm:cs:chapter_3_5 [2026/01/10 10:01] – pczekalski
+++ en:multiasm:cs:chapter_3_5 [2026/01/10 20:11] (current) – pczekalski
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 ===== MIMD =====
-Multiple Instruction Multiple Data is an architecture in which many control units operate on multiple data streams. These are all architectures with more than one processor (multi-processor architectures). MIMD architectures include multi-core processors like modern x64, ARM and even ESP32 SoCs. This also includes supercomputers and distributed systems, using common shared memory or even a distributed but shared memory.
+Multiple Instruction Multiple Data is an architecture in which many control units operate on multiple data streams. These are all architectures with more than one processor (multi-processor architectures). MIMD architectures include multi-core processors such as modern x64, ARM, and even ESP32 SoCs. This also includes supercomputers and distributed systems, using common shared memory or even a distributed but shared memory.
 ===== MISD =====
-Multiple Instruction Single Data. At first glance, it seems illogical, but in these machines, the certainty of correct calculations is crucial and required for the security of system operation. Such an approach can be found in applications like space shuttle computers.
+Multiple Instruction Single Data. At first glance, it seems illogical, but in these machines, the certainty of correct calculations is crucial to the security of system operation. Such an approach can be found in applications like space shuttle computers.
 ===== SIMT =====

en/multiasm/cs/chapter_3_5.1768032073.txt.gz · Last modified: 2026/01/10 10:01 by pczekalski