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--- en:multiasm:piot:chapter_4_2 [2026/02/19 13:39] – jtokarz
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+====== Specific Elements of AVR Architecture ======
+AVR is an extension of the idea presented in Vegard Wollan and Alf-Egil Bogen's thesis. Together with Gaute Myklebust, they patented the architecture, and in 1996, Atmel Norway was established as the AVR microcontroller design center. In 2016, Microchip acquired Atmel.
+AVR architecture (Fig. {{ref>avr_architecture}}) is a popular choice for microcontrollers due to its efficiency and versatility. Here are some specific elements that define the AVR architecture:
+  * RISC Architecture: AVR microcontrollers are based on the RISC (Reduced Instruction Set Computing) architecture, which allows them to execute instructions in a single clock cycle. This results in high performance and low power consumption.
+  * Harvard Architecture: AVR utilises the Harvard architecture, which features separate memory spaces for program code and data. This separation allows simultaneous access to both memories, increasing processing speed.
+  * On-chip Memory: AVR microcontrollers feature built-in flash memory for storing program code, as well as SRAM and EEPROM for data storage. This integration simplifies design and improves reliability.
+  * General-purpose Registers: They contain 32 x 8-bit general-purpose registers, facilitating efficient data manipulation and quick access during operations.
+  * Interrupts: AVR microcontrollers support internal and external interrupt sources.
+  * Real Time Counter (RTC): Timer/Counter Type 2 (TC2) general-purpose, dual-channel, 8-bit timer/counter module. This timer/counter allows clocking from an external 32 kHz watch crystal
+  * I/O Capabilities: AVR microcontrollers offer various programmable I/O lines, allowing flexible interfacing with external devices and peripherals.
+  * Watchdog Timer: A programmable watchdog timer enhances system reliability by resetting the microcontroller in the event of software failure.
+  * Clock Oscillator: The built-in RC oscillator provides the necessary clock signals for the microcontroller's operation.
+<figure avr_architecture>
+{{ :en:multiasm:piot:architecture.png | AVR Architecture }}
+<caption>AVR Architecture Raivo test</caption>
+</figure>
+**Microcontroller Architecture – Component Overview test**
+  * Interrupt Unit - Handles asynchronous events by temporarily halting the main program flow to execute interrupt service routines.
+  * SPI Unit - Implements the Serial Peripheral Interface protocol for high-speed synchronous data exchange with external devices.
+  * Watchdog Timer - A fail-safe timer that resets the system if the software becomes unresponsive or enters an infinite loop.
+  * Analog Comparator - Compares two analog input voltages and outputs a digital signal based on their relative magnitude.
+  * I/O Module - Interfaces with external peripherals, enabling digital input and output operations.
+  * Flash Program Memory - Non-volatile memory used to store the program code, retaining data even when power is lost.
+  * Instruction Register - Temporarily holds the current instruction fetched from program memory before decoding.
+  * Instruction Decoder - Translates the binary instruction into control signals that direct the operation of internal units.
+  * Control Lines - Carry control signals that coordinate data flow and operations across the microcontroller.
+  * Program Counter - Keeps track of the address of the next instruction to be executed, enabling sequential program flow.
+  * Status and Control - Stores flags and control bits that reflect the current state of the processor and influence execution.
+  * 32×8 General Purpose Register - A set of 32 registers, each 8 bits wide, used for temporary data storage and arithmetic operations.
+  * ALU (Arithmetic Logic Unit) - Performs arithmetic and logical operations on data from the general-purpose registers.
+  * Data SRAM - Volatile memory used for runtime data storage, such as variables and stack operations.
+  * EEPROM - Electrically erasable non-volatile memory for storing user data that must persist across power cycles.
+  * I/O Lines - Physical pins that connect the microcontroller to external circuits for input and output tasks.
+  * Data Bus - An 8-bit pathway that transfers data between internal components, enabling communication and processing.
+**Other Architectures:**
+__PIC__
+  * Manufacturer: Microchip Technology
+  * Architecture: RISC
+  * PIC16: 8-bit microcontrollers, various versions with different peripheral sets, low power consumption
+  * PIC18: 8-bit microcontrollers with advanced features such as CAN FD
+  * PIC32: 32-bit microcontrollers, high performance, wide range of applications
+__ESP8266/ESP32__
+  * Manufacturer: Espressif Systems
+  * Architecture: Tensilica Xtensa (extended version based on RISC)
+  * ESP8266: Single-core processor, 80 MHz (overclockable to 160 MHz), 32 KB RAM, 80 KB user RAM, Wi-Fi
+  * ESP32: Dual-core processor, 240 MHz, 520 KB SRAM, Wi-Fi, Bluetooth, more GPIO
+__TI MSP430__
+  * Manufacturer: Texas Instruments
+  * Architecture: RISC
+  * MSP430: 16-bit microcontrollers, ultra-low power consumption, advanced analogue peripherals, fast switching between modes

en/multiasm/piot/chapter_4_2.txt · Last modified: 2026/02/19 18:06 by jtokarz