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en:multiasm:piot:chapter_4_2 [2026/01/01 23:18] – pczekalskien:multiasm:piot:chapter_4_2 [2026/01/19 10:18] (current) – marcin
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 AVR is an extension of the idea presented in Vegard Wollan and Alf-Egil Bogen's thesis. Together with Gaute Myklebust, they patented the architecture, and in 1996, Atmel Norway was established as the AVR microcontroller design center. In 2016, Microchip acquired Atmel. AVR is an extension of the idea presented in Vegard Wollan and Alf-Egil Bogen's thesis. Together with Gaute Myklebust, they patented the architecture, and in 1996, Atmel Norway was established as the AVR microcontroller design center. In 2016, Microchip acquired Atmel.
  
-AVR architecture (figure {{ref>avr_architecture}}) is a popular choice for microcontrollers due to its efficiency and versatility. Here are some specific elements that define the AVR architecture:+AVR architecture (Fig. {{ref>avr_architecture}}) is a popular choice for microcontrollers due to its efficiency and versatility. Here are some specific elements that define the AVR architecture:
   * RISC Architecture: AVR microcontrollers are based on the RISC (Reduced Instruction Set Computing) architecture, which allows them to execute instructions in a single clock cycle. This results in high performance and low power consumption.    * RISC Architecture: AVR microcontrollers are based on the RISC (Reduced Instruction Set Computing) architecture, which allows them to execute instructions in a single clock cycle. This results in high performance and low power consumption. 
   * Harvard Architecture: AVR utilises the Harvard architecture, which features separate memory spaces for program code and data. This separation allows simultaneous access to both memories, increasing processing speed.   * Harvard Architecture: AVR utilises the Harvard architecture, which features separate memory spaces for program code and data. This separation allows simultaneous access to both memories, increasing processing speed.
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 <figure avr_architecture> <figure avr_architecture>
-{{:en:multiasm:piot:architecture.gif?400|AVR Architecture}}+{{:en:multiasm:piot:architecture.svg?400|AVR Architecture}}
 <caption>AVR Architecture</caption> <caption>AVR Architecture</caption>
 </figure> </figure>
  
 +**Microcontroller Architecture – Component Overview**
  
-Other Architectures: +  * Interrupt Unit - Handles asynchronous events by temporarily halting the main program flow to execute interrupt service routines. 
-PIC+  * SPI Unit - Implements the Serial Peripheral Interface protocol for high-speed synchronous data exchange with external devices. 
 +  * Watchdog Timer - A fail-safe timer that resets the system if the software becomes unresponsive or enters an infinite loop. 
 +  * Analog Comparator - Compares two analog input voltages and outputs a digital signal based on their relative magnitude. 
 +  * I/O Module - Interfaces with external peripherals, enabling digital input and output operations. 
 +  * Flash Program Memory - Non-volatile memory used to store the program code, retaining data even when power is lost. 
 +  * Instruction Register - Temporarily holds the current instruction fetched from program memory before decoding. 
 +  * Instruction Decoder - Translates the binary instruction into control signals that direct the operation of internal units. 
 +  * Control Lines - Carry control signals that coordinate data flow and operations across the microcontroller. 
 +  * Program Counter - Keeps track of the address of the next instruction to be executed, enabling sequential program flow. 
 +  * Status and Control - Stores flags and control bits that reflect the current state of the processor and influence execution. 
 +  * 32×8 General Purpose Register - A set of 32 registers, each 8 bits wide, used for temporary data storage and arithmetic operations. 
 +  * ALU (Arithmetic Logic Unit) - Performs arithmetic and logical operations on data from the general-purpose registers. 
 +  * Data SRAM - Volatile memory used for runtime data storage, such as variables and stack operations. 
 +  * EEPROM - Electrically erasable non-volatile memory for storing user data that must persist across power cycles. 
 +  * I/O Lines - Physical pins that connect the microcontroller to external circuits for input and output tasks. 
 +  * Data Bus - An 8-bit pathway that transfers data between internal components, enabling communication and processing. 
 + 
 + 
 +**Other Architectures:** 
 + 
 +__PIC__
   * Manufacturer: Microchip Technology   * Manufacturer: Microchip Technology
   * Architecture: RISC   * Architecture: RISC
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   * PIC32: 32-bit microcontrollers, high performance, wide range of applications   * PIC32: 32-bit microcontrollers, high performance, wide range of applications
  
-ESP8266/ESP32+__ESP8266/ESP32__
   * Manufacturer: Espressif Systems   * Manufacturer: Espressif Systems
   * Architecture: Tensilica Xtensa (extended version based on RISC)   * Architecture: Tensilica Xtensa (extended version based on RISC)
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   * ESP32: Dual-core processor, 240 MHz, 520 KB SRAM, Wi-Fi, Bluetooth, more GPIO   * ESP32: Dual-core processor, 240 MHz, 520 KB SRAM, Wi-Fi, Bluetooth, more GPIO
  
-TI MSP430+__TI MSP430__
   * Manufacturer: Texas Instruments   * Manufacturer: Texas Instruments
   * Architecture: RISC   * Architecture: RISC
en/multiasm/piot/chapter_4_2.1767302324.txt.gz · Last modified: 2026/01/01 23:18 by pczekalski
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